A Dynamically Reconfigurable Pattern Recognition FPGA Architecture Scott Campbell and Daniel A. Connors 2007 International Conference on Reconfigurable Systems and Algorithms July, 2007. Efficient pattern matching is a fundamental building block for many scientific applications. Such applications include elments of text searching, data base operations, data communication, and network security. Although extensive research has been done in this area, there is potential and need for improving hardware-accelerated pattern search using customizable interfaces. This paper presents a time and resource efficient methodology to search for arbitrarily-sized patterns in a data sequence. We present a novel method of dynamically creating a finite state machine based upon input patterns. The FPGA architecture is scalable, allowing multiple concurrent independent searches to be performed. The improvements of our method are made possible by recent advances in FPGA technology capable of implementing complex state machines in on-chip memory blocks. [ PDF ]