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Dr. Alex MW Settle Publications
Publications
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Understanding Cache Interference
Alex Settle. Ph.D. Dissertation, Department of Electrical and Computer Engineering, University of Colorado. November, 2006. [ ABSTRACT ][ PDF ] |
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A Dynamically Reconfigurable Cache for Multithreaded Processors
Alex Settle, Daniel A. Connors, Enric Gibert, Antonio Gonzalez. Journal of Embedded Computing: Special Issue on Single-Chip Multi-core Architectures. December, 2005. [ ABSTRACT ][ PDF ] |
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Understanding the Impact of Inter-Thread Cache Interference on ILP in Modern SMT Processors
Joshua Kihm, Alex Settle, Andy Janiszewski, Daniel A. Connors. The Journal of Instruction Level Parallelism (JILP), Volume 7. June, 2005. [ ABSTRACT ][ PDF ] |
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Dynamic Run-time Architecture Techniques for Enabling Continuous Optimization
Tipp Moseley, Alex Shye, Vijay Janapa Reddi, Matthew Iyer, Dan Fay, Joshua L. Kihm, Alex Settle, Dirk Grunwald, Daniel A. Connors. Proceedings of the 2005 International Conference on Computing Frontiers (CF). May, 2005. [ ABSTRACT ][ PDF ][ Slides PDF ] |
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Architectural Support for Enhanced SMT Job Scheduling
Alex Settle, Joshua Kihm, Andy Janiszewski, Daniel A. Connors. Proceedings of the 13th International Symposium on Parallel Architectures and Compilation Techniques. October, 2004. [ ABSTRACT ][ PDF ] |
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PIN: A Binary Instrumentation Tool in Computer Architecture Research and Education
Vijay Janapa Reddi, Alex Settle, Daniel A. Connors, Robert Cohn. Proceedings of the 7th International Workshop on Computer Architecture Education (WCAE). June, 2004. [ ABSTRACT ][ PDF ] |
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Compiler Controlled Register Stack Management for the Intel Itanium Architecture
Alex Settle, Daniel Lavery, Gerolf Hoflehner, Daniel A. Connors. Proceedings of the 3rd Workshop on Explicitly Parallel Instruction Computing Architectures and Compiler Techniques. March, 2004. [ ABSTRACT ][ PDF ] |
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Optimization for the Intel Itanium Architecture Register Stack.
Alex Settle, Daniel Lavery, Gerolf Hoflehner, Daniel A. Connors. Proceedings of the 1st Conference on Code Generation and Optimization. March, 2003. [ ABSTRACT ][ PDF ] |
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Compiler-Directed Resource Management for Active Code Regions.
Ravikrishnan Sree, Ian Bratt, Alex Settle, Daniel A. Connors. Proceedings of the 7th Workshop on Interaction between Compilers and Computer Architecture. February, 2003. [ ABSTRACT ][ PDF ] |
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Predicate-Based Transformations to Eliminate Control and Data-Irrelevant Cache Misses.
Alex Settle, Ian Bratt, Daniel A. Connors. Proceedings of the 1st Workshop on Explicitly Parallel Instruction Computing Architectures and Compilers. December, 2001. [ ABSTRACT ][ PDF ] |