Rahul Saxena Publications
Publications
Year:
1997
1998
1999
2000
2001
2002
2003
2004
2005
2006
2007
2008
2009
Topic:
Run-time Optimization
Simulation
Fault Tolerance
Transactional Memory
Memory System
FPGA Design
Profiling
Optimization
Thesis
Misc
Profile Merging and Code Versioning for Automated Profile Guided Optimization Systems
Rahul Saxena.
M.S. Thesis, Department of Electrical and Computer Engineering, University of Colorado.
May, 2007.
[
ABSTRACT
][
PDF
]