Characterizing the Use of Program Vulnerability Factors for Studying Transient Fault Tolerance in Multi-core Architectures
Robert Kost, Daniel Connors, Sudeep Pasricha.
Proceedings of the 2009 International Conference on Dependable Systems and Networks (DSN) Workshop on Compiler and Architectural Techniques for Application Reliability and Security (CATARS) June, 2009.
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PLR: A Software Approach to Transient Fault Tolerance for Multi-Core Architectures
Alex Shye, Joseph Blomstedt, Tipp Moseley, Vijay Janapa Reddi, Daniel A. Connors.
IEEE Transactions on Dependable and Secure Computing (TDSC) December, 2008.
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An Adaptive Fault-Tolerant Memory System for FPGA-based Architectures in the Space Environment
Dan Fay, Alex Shye, Sayantan Bhattachrarya, Steve Wichmann, and Daniel A. Connors
2007 NASA/ESA Conference on Adaptive Hardware Systems August, 2007.
[ ABSTRACT ][ PDF ]

Teaching Fault Tolerant FPGA Design for Aerospace Applications
Dan Fay, Scott Campbell, Greg Miller, and Daniel A. Connors
2007 International Conference on Microelectronic Systems Education June, 2007.
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Using Process-Level Redundancy to Exploit Multiple Cores for Transient Fault Tolerance
Alex Shye, Tipp Moseley, Vijay Janapa Reddi, Joseph Blomstedt, Daniel A. Connors.
Proceedings of the 2007 International Conference on Dependable Systems and Networks (DSN). June, 2007.
[ ABSTRACT ][ PDF ]

Transient Fault Tolerance via Dynamic Process Redundancy
Alex Shye, Vijay Janapa Reddi, Tipp Moseley, and Daniel A. Connors
Proceedings of the Workshop on Binary Instrumentation and Applications (WBIA). October, 2006.
[ ABSTRACT ][ PDF ]

Partial Reconfiguration Across FPGAs
Steve Wichman, Sammit Adyha, Scott Ahrens, Rohan Ambli, Brad Alcorn, Dan Fay, Daniel A. Connors
Proceedings of the International Conference on Military and Aerospace Programmable Logic Devices (MAPLD). September, 2006.
[ ABSTRACT ][ PDF ]