Compiler Controlled Register Stack Management for the Intel Itanium Architecture
Alex Settle, Daniel Lavery, Gerolf Hoflehner, Daniel A. Connors.
Proceedings of the 3rd Workshop on Explicitly Parallel Instruction Computing Architectures and Compiler Techniques. March, 2004.
[ ABSTRACT ][ PDF ]

Optimization for the Intel Itanium Architecture Register Stack.
Alex Settle, Daniel Lavery, Gerolf Hoflehner, Daniel A. Connors.
Proceedings of the 1st Conference on Code Generation and Optimization. March, 2003.
[ ABSTRACT ][ PDF ]

Predicate-Based Transformations to Eliminate Control and Data-Irrelevant Cache Misses.
Alex Settle, Ian Bratt, Daniel A. Connors.
Proceedings of the 1st Workshop on Explicitly Parallel Instruction Computing Architectures and Compilers. December, 2001.
[ ABSTRACT ][ PDF ]

Integrated Predicated and Speculative Execution in the IMPACT EPIC Archtecture.
David I. August, Daniel A. Connors, Scott A. Mahlke, John W. Sias, Kevin M. Crozier, Ben-Chung Cheng, Patrick R. Eaton, Qudus B. Olaniran, Wen-mei W. Hwu.
Proceedings of the 25th International Symposium on Computer Architecture. July, 1998.
[ ABSTRACT ][ PDF ]