Implementation of Fine-Grained Cache Monitoring for Improved SMT Scheduling
Joshua Kihm, Daniel A. Connors.
Proceedings of the 2004 International Conference on Computer Design. October, 2004.
[ ABSTRACT ][ PDF ]

Architectural Support for Enhanced SMT Job Scheduling
Alex Settle, Joshua Kihm, Andy Janiszewski, Daniel A. Connors.
Proceedings of the 13th International Symposium on Parallel Architectures and Compilation Techniques. October, 2004.
[ ABSTRACT ][ PDF ]

A Very Fast Simulated Annealing Scheduler for Radioactive Transfer Data in Climate Models
S.P. Muszala, G. Alaghband, D.A. Connors, J.J. Hack.
Proceedings of the 17th International Conference on Parallel and Distributed Computing Systems (PDCS). September, 2004.
[ ABSTRACT ][ PDF ]

Predictable Fine Grained Cache Behavior for Enhanced Simulaneous Multithreading (SMT) Scheduling
Joshua Kihm, Andy Janiszewski, Daniel A. Connors.
Proceedings of the 2004 Conference on Computing, Communications, and Technologies. August, 2004.
[ ABSTRACT ][ PDF ]

PIN: A Binary Instrumentation Tool in Computer Architecture Research and Education
Vijay Janapa Reddi, Alex Settle, Daniel A. Connors, Robert Cohn.
Proceedings of the 7th International Workshop on Computer Architecture Education (WCAE). June, 2004.
[ ABSTRACT ][ PDF ]

Compiler Controlled Register Stack Management for the Intel Itanium Architecture
Alex Settle, Daniel Lavery, Gerolf Hoflehner, Daniel A. Connors.
Proceedings of the 3rd Workshop on Explicitly Parallel Instruction Computing Architectures and Compiler Techniques. March, 2004.
[ ABSTRACT ][ PDF ]