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Publications
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A Dynamically Reconfigurable Cache for Multithreaded Processors
Alex Settle, Daniel A. Connors, Enric Gibert, Antonio Gonzalez. Journal of Embedded Computing: Special Issue on Single-Chip Multi-core Architectures. December, 2005. [ ABSTRACT ][ PDF ] |
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Deploying Dynamic Code Transformation in Modern Computing Environments
Vijay Janapa Reddi. M.S. Thesis, Department of Electrical and Computer Engineering, University of Colorado. November, 2005. [ ABSTRACT ][ PDF ] |
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A Dynamic Compilation Framework for Controlling Microprocessor Energy and Performance
Qiang Wu, Vijay Janapa Reddi, Youfeng Wu, Daniel A. Connors, David Brooks, Margaret Martonosi, Douglas W. Clark Proceedings of the 38th IEEE/ACM International Symposium on Microarchitecture (MICRO). November, 2005. [ ABSTRACT ][ PDF ] |
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Hardware-Compiler Co-Design for Adjustable Data Power Savings
Hillery C. Hunter, Erik M. Nystrom, Daniel A. Connors, Wen-mei W. Hwu. Proceedings of the 7th Workshop on Media and Streaming Processors. November, 2005. [ ABSTRACT ][ PDF ] |
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Chip-Multiprocessor Scalability for Single-Threaded Applications Neil Vachharajani, Matthew Iyer, Chinmay Ashok, David August, Daniel A. Connors, Manish Vachharajani Proceedings of the 2005 Workshop on Design, Architecture, and Simulation of Chip Multi-Processors (dasCMP). November, 2005. [ ABSTRACT ][ PDF ] |
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Identifying and Exploiting Memory Access Characteristics for Prefetching Linked Data Structures
Hassan Al-Sukhni. Ph.D. Dissertation, Department of Electrical and Computer Engineering, University of Colorado. November, 2005. [ ABSTRACT ][ PDF ] |
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Methods for Modeling Resource Contention on Simultaneous Multithreading Processors
Tipp Moseley, Joshua Kihm, Daniel A. Connors, Dirk Grunwald. Proceedings of the 2005 International Conference on Computer Design (ICCD). October, 2005. [ ABSTRACT ][ PDF ][ Slides PDF ] |
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Code Coverage Testing Using Hardware Performance Monitoring Support
Alex Shye, Matthew Iyer, Vijay Janapa Reddi, Daniel A. Connors. Proceedings of the 6th International Symposium on Automated and Analysis-Driven Debugging (AADEBUG). September, 2005. [ ABSTRACT ][ PDF ] |
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Statistical Simulation of Multithreaded Architectures
Joshua Kihm and Daniel A. Connors. Proceedings of 13th Annual Meeting of the IEEE International Symposium on Modeling, Analysis, and Simulation of Computer Systems. September, 2005. [ ABSTRACT ][ PDF ] |
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Persistence in Dynamic Code Transformation Systems
Vijay Janapa Reddi, Daniel A. Connors and Robert S. Cohn. Proceedings of the Workshop on Binary Instrumentation and Applications (WBIA). September, 2005. [ ABSTRACT ][ PDF ] |
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The Promise of Load-Balancing the Parameterization of Moist Convection on
Multi-Processor Systems
S.P. Muszala, J.J. Hack, D.A. Connors, G. Alaghband Journal of Atmospheric and Oceanic Technology. July, 2005. [ ABSTRACT ][ PDF ] |
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Understanding the Impact of Inter-Thread Cache Interference on ILP in Modern SMT Processors
Joshua Kihm, Alex Settle, Andy Janiszewski, Daniel A. Connors. The Journal of Instruction Level Parallelism (JILP), Volume 7. June, 2005. [ ABSTRACT ][ PDF ] |
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A Mathematical Model for Accurately Balancing Co-Phase Effects in Simulated Multithreaded Systems
Joshua Kihm, Tipp Moseley, Daniel A. Connors. Proceedings of The Workshop on Modeling, Benchmarking, and Simulation (MoBS 05) held in conjunction with ISCA-32. May, 2005. [ ABSTRACT ][ PDF ] |
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Dynamic Run-time Architecture Techniques for Enabling Continuous Optimization
Tipp Moseley, Alex Shye, Vijay Janapa Reddi, Matthew Iyer, Dan Fay, Joshua L. Kihm, Alex Settle, Dirk Grunwald, Daniel A. Connors. Proceedings of the 2005 International Conference on Computing Frontiers (CF). May, 2005. [ ABSTRACT ][ PDF ][ Slides PDF ] |
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Exploring the Potential of Performance Monitoring Hardware to Support Run-time Optimization
Alex Shye. M.S. Thesis, Department of Electrical and Computer Engineering, University of Colorado. May, 2005. [ ABSTRACT ][ PDF ] |
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Analysis of Hardware Acceleration in Reconfigurable Embedded Systems
Mathew Ouellette and Daniel A. Connors Proceedings of the 12th Reconfigurable Architectures Workshop (RAW 2005). April, 2005. [ ABSTRACT ][ PDF ] |
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Finding Parallelism for Future EPIC Machines Matthew Iyer, Chinmay Ashok, Josh Stone, Neil Vachharajani, Daniel A. Connors, Manish Vachharajani. Proceedings of the 4th Workshop on Explicitly Parallel Instruction Computing. March, 2005. [ ABSTRACT ][ PDF ] |
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Analysis of Path Profiling Information Generated with Performance Monitoring Hardware
Alex Shye, Matthew Iyer, Tipp Moseley, Dan Fay, Vijay Janapa Reddi, Daniel A. Connors. Proceedings of the 9th Workshop on Interaction between Compilers and Computer Architecture (INTERACT). February, 2005. [ ABSTRACT ][ PDF ] |